Parallel Input Output Controler Peripheral

PIOA (AT91S_PIO) 0xFFFFF400 (AT91C_BASE_PIOA)
Periph ID AIC Symbol Description
2 (AT91C_ID_PIOA)Parallel IO Controller

Function Description
AT91F_PIOA_CfgPMCEnable Peripheral clock in PMC for PIOA


PIO Software API (AT91S_PIO)

Offset Field Description
0x0PIO_PERPIO Enable Register
0x4PIO_PDRPIO Disable Register
0x8PIO_PSRPIO Status Register
0x10PIO_OEROutput Enable Register
0x14PIO_ODROutput Disable Registerr
0x18PIO_OSROutput Status Register
0x20PIO_IFERInput Filter Enable Register
0x24PIO_IFDRInput Filter Disable Register
0x28PIO_IFSRInput Filter Status Register
0x30PIO_SODRSet Output Data Register
0x34PIO_CODRClear Output Data Register
0x38PIO_ODSROutput Data Status Register
0x3CPIO_PDSRPin Data Status Register
0x40PIO_IERInterrupt Enable Register
0x44PIO_IDRInterrupt Disable Register
0x48PIO_IMRInterrupt Mask Register
0x4CPIO_ISRInterrupt Status Register
0x50PIO_MDERMulti-driver Enable Register
0x54PIO_MDDRMulti-driver Disable Register
0x58PIO_MDSRMulti-driver Status Register
0x60PIO_PPUDRPull-up Disable Register
0x64PIO_PPUERPull-up Enable Register
0x68PIO_PPUSRPad Pull-up Status Register
0x70PIO_ASRSelect A Register
0x74PIO_BSRSelect B Register
0x78PIO_ABSRAB Select Status Register
0xA0PIO_OWEROutput Write Enable Register
0xA4PIO_OWDROutput Write Disable Register
0xA8PIO_OWSROutput Write Status Register

Function Description
AT91F_PIO_IsOutputWriteSetTest if PIO OutputWrite is Set
AT91F_PIO_InterruptDisableDisable PIO Interrupt
AT91F_PIO_GetOutputDataStatusReturn PIO Output Data Status
AT91F_PIO_GetInputReturn PIO input value
AT91F_PIO_DisableDisable PIO
AT91F_PIO_IsAB_RegisterSetTest if PIO AB Register is Set
AT91F_PIO_CfgOutputEnable PIO in output mode
AT91F_PIO_OutputWriteEnableOutput Write Enable PIO
AT91F_PIO_EnableEnable PIO
AT91F_PIO_SetOutputSet to 1 output PIO
AT91F_PIO_GetOutputStatusReturn PIO Output Status
AT91F_PIO_GetOutputWriteStatusReturn PIO Output Write Status
AT91F_PIO_MultiDriverEnableMulti Driver Enable PIO
AT91F_PIO_B_RegisterSelectionPIO B Register Selection
AT91F_PIO_OutputDisableOutput Enable PIO
AT91F_PIO_Get_AB_RegisterStatusReturn PIO Interrupt Status
AT91F_PIO_IsMultiDriverSetTest if PIO MultiDriver is Set
AT91F_PIO_InputFilterEnableInput Filter Enable PIO
AT91F_PIO_GetMultiDriverStatusReturn PIO Multi Driver Status
AT91F_PIO_InterruptEnableEnable PIO Interrupt
AT91F_PIO_GetCfgPullupReturn PIO Configuration Pullup
AT91F_PIO_CfgInputEnable PIO in input mode
AT91F_PIO_GetInputFilterStatusReturn PIO Input Filter Status
AT91F_PIO_A_RegisterSelectionPIO A Register Selection
AT91F_PIO_OutputWriteDisableOutput Write Disable PIO
AT91F_PIO_IsInputFilterSetTest if PIO Input filter is Set
AT91F_PIO_GetInterruptStatusReturn PIO Interrupt Status
AT91F_PIO_CfgDirectDriveEnable direct drive on PIO
AT91F_PIO_IsSetTest if PIO is Set
AT91F_PIO_IsInterruptMaskedTest if PIO Interrupt is Masked
AT91F_PIO_MultiDriverDisableMulti Driver Disable PIO
AT91F_PIO_IsInterruptSetTest if PIO Interrupt is Set
AT91F_PIO_OutputEnableOutput Enable PIO
AT91F_PIO_InputFilterDisableInput Filter Disable PIO
AT91F_PIO_IsOutputDataStatusSetTest if PIO Output Data Status is Set
AT91F_PIO_CfgInputFilterEnable input filter on input PIO
AT91F_PIO_CfgPeriphEnable pins to be drived by peripheral
AT91F_PIO_IsCfgPullupStatusSetTest if PIO Configuration Pullup Status is Set
AT91F_PIO_GetStatusReturn PIO Status
AT91F_PIO_ClearOutputSet to 0 output PIO
AT91F_PIO_IsInputSetTest if PIO is input flag is active
AT91F_PIO_IsOuputSetTest if PIO Output is Set
AT91F_PIO_CfgOpendrainConfigure PIO in open drain
AT91F_PIO_CfgPullupEnable pullup on PIO
AT91F_PIO_GetInterruptMaskStatusReturn PIO Interrupt Mask Status
AT91F_PIO_ForceOutputForce output when Direct drive option is enabled

PIO Register Description

PIO: AT91_REG PIO_PER - PIO Enable Register


This register is used to enable control of individual pins by the PIO controller rather than by an internally connected periph-eral. When the PIO is enabled, the Data to Peripheral (d_to_periph_a or d_to_periph_b) signal is held at logic zero. The register is programmed as follows:
1 = Enables the PIO to control the corresponding pin (disables peripheral control of the pin).
0 = No effect.

PIO: AT91_REG PIO_PDR - PIO Disable Register


This register is used to disable control of individual pins by the PIO controller. When PIO control is disabled, the peripheral function (if any) connected to the I/O channel is enabled to control the corresponding pin. The register is programmed as follows:
1 = Disables the PIO from controlling the corresponding pin (enables peripheral control of the pin).
0 = No effect.

PIO: AT91_REG PIO_PSR - PIO Status Register


This register indicates which pins are enabled for PIO control. This register is updated when PIO lines are enabled or dis-abled.The register reads as follows:
1 = PIO is active on the corresponding line (peripheral is inactive).
0 = PIO is inactive on the corresponding line (peripheral is active).

PIO: AT91_REG PIO_OER - Output Enable Register


This register is used to enable PIO output drivers. If the pin is driven by an internally connected peripheral, PIO_OER has no effect on the pin, but the information is stored. The register is programmed as follows:
1 = Enables the PIO output on the corresponding pin.
0 = No effect.

PIO: AT91_REG PIO_ODR - Output Disable Registerr


This register is used to disable PIO output drivers. If the pin is driven by the peripheral, this has no effect on the pin, but the information is stored. The register is programmed as follows:
0 = No effect.
1 = Disables the PIO output on the corresponding pin.

PIO: AT91_REG PIO_OSR - Output Status Register


This register shows the PIO pin control (output enable) status which is programmed in PIO_OER and PIO ODR. The defined value is effective only if the pin is controlled by the PIO. The register reads as follows:
0 = The corresponding PIO is input on this line.
1 = The corresponding PIO is output on this line.

PIO: AT91_REG PIO_IFER - Input Filter Enable Register


This register is used to enable input glitch filters. It affects the pin whether or not the PIO is enabled. The register is programmed as follows:
0 = No effect.
1 = Enables the glitch filter on the corresponding pin.

PIO: AT91_REG PIO_IFDR - Input Filter Disable Register


This register is used to disable input glitch filters. It affects the pin whether or not the PIO is enabled. The register is pro-grammed as follows:
0 = No effect.
1 = Disables the glitch filter on the corresponding pin.

PIO: AT91_REG PIO_IFSR - Input Filter Status Register


This register indicates which pins have glitch filters selected. It is updated when PIO outputs are enabled or disabled by writing to PIO_IFER or PIO_IFDR.
0 = Filter is not selected on the corresponding input.
1 = Filter is selected on the corresponding input (peripheral and PIO).

PIO: AT91_REG PIO_SODR - Set Output Data Register


This register is used to set PIO output data. It affects the pin only if the corresponding PIO output line is enabled and if the pin is controlled by the PIO. Otherwise, the information is stored.
0 = No effect.
1 = PIO output data on the corresponding pin is set.

PIO: AT91_REG PIO_CODR - Clear Output Data Register


This register is used to clear PIO output data. It affects the pin only if the corresponding PIO output line is enabled and if the pin is controlled by the PIO. Otherwise, the information is stored.
0 = No effect.
1 = PIO output data on the corresponding pin is cleared.

PIO: AT91_REG PIO_ODSR - Output Data Status Register


This register shows the output data status which is programmed in PIO_SODR or PIO_CODR. The defined value is effec-tive only if the pin is controlled by the PIO Controller and only if the pin is defined as an output.
0 = The output data for the corresponding line is programmed to 0.
1 = The output data for the corresponding line is programmed to 1.

PIO: AT91_REG PIO_PDSR - Pin Data Status Register


This register shows the logic level of the physical I/O pin. The pin logic levels are always valid, regardless of whether the pins are enabled as PIO, peripheral, input or output. The value of this register will depend on the level of the external pins. The register reads as follows:
1 = The corresponding pin is at logic 1.
0 = The corresponding pin is at logic 0.

PIO: AT91_REG PIO_IER - Interrupt Enable Register


This register is used to enable PIO interrupts generated by the corresponding pins; logic level changes are detected and stored in the Interrupt Status Register (PIO_ISR). Enabled interrupts will be generated whether the PIO is enabled or not. The register is programmed as follows:
1 = Enables an interrupt when a change of logic level is detected on the corresponding pin.
0 = No effect.

PIO: AT91_REG PIO_IDR - Interrupt Disable Register


This register is used to enable PIO interrupts generated by the corresponding pins; logic level changes are detected and stored in the Interrupt Status Register (PIO_ISR). Enabled interrupts will be generated whether the PIO is enabled or not. The register is programmed as follows:
1 = Enables an interrupt when a change of logic level is detected on the corresponding pin.
0 = No effect.

PIO: AT91_REG PIO_IMR - Interrupt Mask Register


This register shows which pins have interrupts enabled. It is updated when interrupts are enabled or disabled by writing to PIO_IER or PIO_IDR. The register reads as follows:
1 = Interrupt is enabled from the corresponding pin.
0 = Interrupt is disabled from the corresponding pin.

PIO: AT91_REG PIO_ISR - Interrupt Status Register


This register indicates, for each pin, when a logic level change has been detected (rising or falling edge). This is valid whether the PIO is selected for the pin or not and whether the pin is an input or output. The register is reset to zero following a read, as well as at reset. The register reads as follows:
1 = At least one change has been detected on the corresponding pin since the register was last read or since reset.
0 = No change has been detected on the corresponding pin since the register was last read or since reset.

PIO: AT91_REG PIO_MDER - Multi-driver Enable Register


This register shows the logic level of the physical I/O pin. The pin logic levels are always valid, regardless of whether the pins are enabled as PIO, peripheral, input or output. The value of this register will depend on the level of the external pins. The register reads as follows:
1 = The corresponding pin is at logic 1.
0 = The corresponding pin is at logic 0.

PIO: AT91_REG PIO_MDDR - Multi-driver Disable Register


This register shows the logic level of the physical I/O pin. The pin logic levels are always valid, regardless of whether the pins are enabled as PIO, peripheral, input or output. The value of this register will depend on the level of the external pins. The register reads as follows:
1 = The corresponding pin is at logic 1.
0 = The corresponding pin is at logic 0.

PIO: AT91_REG PIO_MDSR - Multi-driver Status Register


This register shows the logic level of the physical I/O pin. The pin logic levels are always valid, regardless of whether the pins are enabled as PIO, peripheral, input or output. The value of this register will depend on the level of the external pins. The register reads as follows:
1 = The corresponding pin is at logic 1.
0 = The corresponding pin is at logic 0.

PIO: AT91_REG PIO_PPUDR - Pull-up Disable Register


0 = No effect.
1 = Input pad pull-up is disabled.

PIO: AT91_REG PIO_PPUER - Pull-up Enable Register


0 = No effect.
1 = Input pad pull-up is enabled.

PIO: AT91_REG PIO_PPUSR - Pad Pull-up Status Register


0 = Input pad pull-up is enabled.
1 = Input pad pull-up is disabled with an active low level pull-up control pin.

PIO: AT91_REG PIO_ASR - Select A Register


1 = Select peripheral A.
0 = No effect.

PIO: AT91_REG PIO_BSR - Select B Register


1 = Select peripheral B.
0 = No effect.

PIO: AT91_REG PIO_ABSR - AB Select Status Register


0 = Peripheral A Selected.
1 = Peripheral B Selected.

PIO: AT91_REG PIO_OWER - Output Write Enable Register


1 = Enables the possibility to write directly to PIO_ODSR Register.
0 = No effect.

PIO: AT91_REG PIO_OWDR - Output Write Disable Register


1 = Disables the possibility to write directly to PIO_ODSR Register.
0 = No effect.

PIO: AT91_REG PIO_OWSR - Output Write Status Register


1 = Direct write to PIO_ODSR is enabled.
0 = Direct write to PIO_ODSR is disabled.